Abstract:
The state space integral controller approach is highly effective for precise and efficient voltage control of DC-DC buck
converters, which are crucial in a wide range of applications. This paper presents strategies for implementing a Genetic Algorithm (GA)
to tune the gain parameters of a state feedback controller with integral action using FPGA technology. The GA optimizes controller gains
to achieve desired dynamic performance and zero steady-state error under multiple constraints. By leveraging the parallel processing
capabilities of FPGAs, the GA’s parallel behavior can be effectively utilized to accelerate computations. We implemented the GA on a
PYNQ-Z2 SoC FPGA using Vivado high-level synthesis tools, starting with a population of 12 solutions and running for 20 iterations.
Our results show that the GA effectively tunes gains to meet various overshoot and settling time requirements while maintaining zero
steady-state error. Additionally, we observed a 5.3-fold speed-up in execution with our 100 MHz customized design compared to the
650 MHz ARM processor. By using an FPGA board with more resources, the design clock frequency and thus the throughput and
acceleration could be improved further. Integrating GA with FPGA technology significantly reduces the latency for computation making
it highly beneficial for any GA based real-time applications.
