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Browsing 02. International Journal of Computing and Digital Systems by Subject "FPGA"

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Browsing 02. International Journal of Computing and Digital Systems by Subject "FPGA"

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  • Adaptive Fuzzy Hardware Scheduler for Real Time Operating System 
    Harkut, D. G.; Ali, M. S. (2016-11-01)
    In embedded system, a real-time operating system (RTOs) is often used to structure the application code and ensure that the deadlines are met by reacting on events in the environment by executing the functions within precise ...
  • Analysis and Design of E1 over Ethernet Gateway 
    Suleiman, Abdul-Bary Raouf; Ali, Dia M.; Hero, Nashwan Z. (2013)
    The most commonly used technique in networking nowadays is packet switching. It has become one of the important infrastructure elements in the communication society. Time-division multiplexing (TDM) and Synchronous Digital ...
  • A Carry-Look Ahead Adder Based Floating-Point Multiplier for Adaptive Filter Applications 
    Pathan, Aneela; Memon, Tayab D; Memon, Sheeraz (2018-03-01)
    Floating-point arithmetic has various applications in the field of Science and Engineering. Specially, need of high precision floating-point multipliers is observed in Digital Signal Processing- like in filtering and ...
  • Compact and High Speed Point Multiplication Architecture for Elliptic Curve Diffie-Hellman Algorithm on Reconfigurable Computing 
    Tadesse, Abiy; Negash, Yalemzewd; Kumar, P. G. V. Suresh (2021-07-14)
    Elliptic curve cryptography is popular for its efficiency and strong security as it provides equivalent security strength using smaller key sizes compared to other public key algorithms such as RSA that commonly use larger ...
  • Evaluation of Artificial Neural Network Architectures for Pattern Recognition on FPGA 
    Huynh, Thang Viet (2017-05-01)
    In this paper, we present the design and implementation of two hardware architectures, namely MHL-ANN and SHL-ANN, for the realization of artificial neural networks on reconfigurable computing platforms like FPGA. We use ...
  • FPGA Implementation of Enhanced JPEG Algorithm for Colored Images 
    Abed, Sa’ed; AlKandari, Mariam; AlRasheedi, Huda; Ahmad, Imtiaz (2020-01-01)
    Image quality and size have been growing very fast over the last decades requiring large storage space and high transmission rate. Image compression is an efficient method used to reduce the size of the image. JPEG algorithm ...
  • FPGA Implementation of Prototype Filter Bank Multicarrier Modulator 
    Al-Haddad, Mohammed; Ziboon, Hadi Tarish (2021-06-10)
    Filter Bank Multicarrier (FBMC) is an emerging modulation technique that employs pulse shaping for improved spectral properties. However, the implementation complexity of FBMC is higher than the currently adopted modulation ...
  • FPGA-based Acceleration for Convolutional Neural Networks on PYNQ-Z2 
    Viet Huynh, Thang (2021-08-13)
    Convolutional neural network is now widely used in computer vision and deep learning applications. The most compute-intensive layer in convolutional neural networks is the convolutional layer, which should be accelerated ...
  • Introduction to Special Issue: Design and Performance of Networks on Chip 
    Abdallah,Abderazek Ben; Vaidyanathan,Ramachandran; Ariwa,Ezendu; El-Medany,Wael (2016)
    This special issue of International Journal of Computing and Digital Systems (IJCDS) focuses on Design and Performance of Networks on Chip, and publishes selected papers from the 2nd International Workshop on Design and ...
  • Real Time Implementation of Stegofirewall System 
    Al-Sultan, Muthana R.; Ameen, Siddeeq Y.; Abduallah, Wafaa M. (2019-09-01)
    Great efforts made to detect secret hidden information within digital files. Unfortunately, these efforts are consuming large amount of time and may fail if the hidden information encrypted. Therefore, destruction of such ...
  • RSA Power Analysis Obfuscation: A Dynamic Algorithmic Hardware Countermeasure 
    Andel, Todd R.; Barron, John W.; McDonald, J. Todd; Humphries, Jeffrey W. (2014)
    The modular exponentiation operation used in popular public key encryption schemes, such as RSA, has been the focus of many side channel analysis (SCA) attacks in recent years. Current SCA attack countermeasures are static, ...
  • VLSI Architectures of Booth Multiplication Algorithms – A Review 
    Hareesh, B; Moses C, John; MVV Prasad, Kantipudi (2021-08-17)
    The Booth multiplication scheme plays a major role in designing signed multiplier using multiplier encoder and by decreasing the number of intermediate products. Both radix-4 and radix-8 Booth encoding schemes are widely ...

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