A Low Leakage Down-conversion K-Band MIXER using Current-Reuse Double-Balanced Architecture in 130-nm CMOS Process for Modern RF Applications

Abstract

A low noise and high conversion gain mixer is presented in this work which is effectively utilizing the differential biasing condition, separately for the transconductance stage and the switching stage, due to the folded double-balanced current reuse design. This has provided a great opportunity to work on the noise performance by reducing the noise figure separately for both stages. The mixer’s architecture has been planned initially for the C-band and has been tested for the same, then the design parameters have been scaled with the same topology for the K- band (23 to 25 GHz). In this range of RF bandwidth, the proposed mixer’s architecture shows the highest conversion gain of 24.2 dB, additionally with an excellent noise performance (noise figure of 7.9 dB) where a -3 dBm signal power has been fed from the local oscillator (LO). A higher extent of linearity has also been achieved with the 1-dB compression point of -17.8 dBm at the RF frequency of 24 GHz. From 23 to 25 GHz, the LO-to-RF, LO-to-IF isolations are approximately 36 dB and 30 dB, respectively. Implemented double balance current reuse architecture of the proposed mixer shows a power dissipation of 26.8 mW with a relatively higher power supply bias of 2.5 V. All the simulations have been performed on Advanced Design System (Keysight Technology) with 130 nm RF-CMOS (UMC) technology.