University of Bahrain
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True Single Phase Clock based UP-DOWN Counter using GDI Cell for Low Power Applications

Show simple item record Chauhan, Jitesh Singh Chauhan, Ram Chandra Singh 2021-07-11T08:44:31Z 2021-07-11T08:44:31Z 2021-07-11
dc.identifier.issn 2210-142X
dc.description.abstract The designing of low power circuits has been a constant area of research in integrated circuits. As the technology advances, the electronic systems are becoming battery operated hence the efficient utilization of power is necessary because of limited power sources. In computers, the memory requirement is unavoidable, so flip-flops are used as digital data storage unit. Flip-Flops are sequential circuits whose response is controlled by the clock signal. While studying the internal circuitry of the flip-flops we can observe that the power dissipation depends mostly on the switching activity of the circuit due to clock signal. Here we have proposed a reset-abled flip-flop which is fast in performance, has low power dissipation at high data activity and requires less area on silicon chip. Flip-Flop finds numerous applications like counters, shift registers, memory elements etc. Here we have proposed an UP-DOWN counter using gate diffusion input (GDI) cell, its performance is evaluated and compared with conventional method-based counters. The circuits are simulated in standard 90 nm CMOS process technology in Cadence Virtuoso EDA tool. The performance analysis of the proposed flip-flop at 400 MHz clock frequency shows that the power dissipation is 187.1 nW, signal propagation delay is 127.15 ps and area requirement is 81.8 µm2. Also, at 1 GHz clock frequency, the proposed counter dissipates 1040.55 nW power and it requires 388.2 µm2 area on IC chip. en_US
dc.language.iso en en_US
dc.publisher University of Bahrain en_US
dc.rights Attribution-NonCommercial-NoDerivatives 4.0 International *
dc.rights.uri *
dc.subject Low Power en_US
dc.subject VLSI en_US
dc.subject UP-DOWN Counter en_US
dc.subject TSPC en_US
dc.subject GDI cell en_US
dc.subject CMOS Circuits en_US
dc.title True Single Phase Clock based UP-DOWN Counter using GDI Cell for Low Power Applications en_US
dc.contributor.authorcountry India en_US
dc.contributor.authorcountry India en_US
dc.contributor.authoraffiliation Institute of Engineering and Technology India en_US
dc.contributor.authoraffiliation (Institute of Engineering and Technology India en_US
dc.source.title International Journal of Computing and Digital System en_US
dc.abbreviatedsourcetitle IJCDS en_US

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