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New Results in Reduced Round AES - 256 Impossible Differential Cryptanalysis

Show simple item record Jithendra, K.B Shahana, T.Kassim 2020-10-28T09:22:20Z 2020-10-28T09:22:20Z 2020-07-01
dc.identifier.issn 2210-142X
dc.description.abstract Security of Crypto systems is usually analyzed through different cryptanalytic methods. Since Advance Encryption Standard (AES) is one of the most widely used and popular block cipher, a number of attacks have already been proposed on it. Lots of reduced round attacks on AES are available in the literature. In this paper, two efficient reduced round impossible differential attacks are introduced against AES - 256.The attacks proposed here show how an attack can modified for betterment. The first one is a new 8th round attack, which shows the data complexity and time complexity can get interchanged without affecting the memory requirement, by introducing proper change in the attack procedure.The second cryptanalysis is carried out in which four round impossible differential begins from third round only, wherein conventional attacks it starts from second round itself. This difference in attack procedure leads to reduction in data as well as time complexities. Moreover, the interchange of Add Round Key and Mix Column operations done in the 7th round of conventional impossible attacks can be avoided here. A conventional attack appeared in the literature is taken as the main reference. Comparison of the complexities is also given. en_US
dc.language.iso en en_US
dc.publisher University of Bahrain en_US
dc.rights Attribution-NonCommercial-NoDerivatives 4.0 International *
dc.rights.uri *
dc.subject AES-256, Cryptanalysis, Impossible Differentials, Complexity en_US
dc.title New Results in Reduced Round AES - 256 Impossible Differential Cryptanalysis en_US
dc.volume 9 en_US
dc.issue 4 en_US
dc.pagestart 755 en_US
dc.pageend 764 en_US
dc.contributor.authorcountry India en_US
dc.contributor.authorcountry India en_US
dc.contributor.authoraffiliation Department of Electronics and Communication, College of Engineering, Thalassery, Kerala en_US
dc.contributor.authoraffiliation Division of Electronics, School of Engineering, CUSAT, Kerala en_US
dc.source.title International Journal of Computing and Digital Systems en_US
dc.abbreviatedsourcetitle IJCDS en_US

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