dc.contributor.author | Tripathi, Divya | |
dc.contributor.author | Wairya, Subodh | |
dc.date.accessioned | 2021-08-20T17:03:25Z | |
dc.date.available | 2021-08-20T17:03:25Z | |
dc.date.issued | 2021-08-20 | |
dc.identifier.issn | 2210-142X | |
dc.identifier.uri | https://journal.uob.edu.bh:443/handle/123456789/4466 | |
dc.description.abstract | Quantum-dot cellular automata (QCA) is an ingenious nano system prototype offers less dimensions with additional fast speeds and reflected as an amplification to the scaling complications with CMOS methodology. In this article an efficient QCA 2- input XOR gate and to explore the productiveness of our projected QCA XOR gate, numerous complex QCA design like an optimum 4-bit, 8-bit, 16-bit and the 32-bit QCA layout of binary to gray (B2G) and gray to binary (G2B) code converters has been proposed well ahead. The projected gate is modest in structure and powerful in standings of executing digital circuits and conquers a fraction of the area, as associated with earlier designs. The proposed efficient XOR gate has only 9 cells and has 0.018 μm2, an area which is the smallest among all previous designs. As per the performance execution parameter comparison, it is monitored that the proposed QCA architecture of 4-bit B2G and G2B achieve up to 41.26% and 45.61% enhancement creating them the most cost efficient QCA architectures. The proposed design is extended to n-bit code converters. These circuits are suitable for boosting the compound structures. The functionality of projected structures being examined by the QCADesigner tool. | en_US |
dc.language.iso | en | en_US |
dc.publisher | University of Bahrain | en_US |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | QCA | en_US |
dc.subject | XOR | en_US |
dc.subject | B2G | en_US |
dc.subject | G2B | en_US |
dc.title | A Cost Efficient QCA Code Converters for Nano Communication Applications | en_US |
dc.identifier.doi | https://dx.doi.org/10.12785/ijcds/120128 | |
dc.contributor.authorcountry | India | en_US |
dc.contributor.authorcountry | India | en_US |
dc.contributor.authoraffiliation | Electronics & Communication Engineering Department, I.E.T., Lucknow | en_US |
dc.contributor.authoraffiliation | Dr. APJ Abdul Kalam Technical University, Lucknow | en_US |
dc.source.title | International Journal Of Computing and Digital System | en_US |
dc.abbreviatedsourcetitle | IJCDS | en_US |
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