University of Bahrain
Scientific Journals

VLSI Design of a Processor for Discrete Wavelet Packet and Hilbert Transforms

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dc.contributor.author Dibal, Peter Yusuf
dc.contributor.author N. Onwuka, Elizabeth
dc.contributor.author Agajo, James
dc.contributor.author O. Alenoghena, Caroline
dc.contributor.author Adejo, Achonu
dc.date.accessioned 2020-07-21T09:33:51Z
dc.date.available 2020-07-21T09:33:51Z
dc.date.issued 2021-01-01
dc.identifier.issn 2210-142X
dc.identifier.uri https://journal.uob.edu.bh:443/handle/123456789/3993
dc.description.abstract Very Large Scale Integration (VLSI) design is a technological advancement in electronics that has widely shortened the window from concept to a working prototype in any design. It has also made it possible to design and develop sophisticated and intelligent electronic systems which are easily adaptable to any field of human endeavor with relative ease. In this paper, the VLSI design of a processor system is presented, which implements two transforms i.e. the discrete wavelet packet, and the Hilbert transforms. The combination of these two transforms in a single processor makes it possible to have a system with enhanced sub-band frequency edge detection in a wideband signal and other specialized areas, which is very useful in such specialized areas of application as spectrum sensing in cognitive radio networks. The results obtained from the simulation and design verification of the processor system showed the effectiveness of the design methodology presented in this paper. As a matter of fact, the arithmetic operators designed in this paper outperformed the arithmetic operators of the Xilinx IP CORE when compared in terms of speed. From the results obtained, it was clear that the processor design performed as expected, at a great speed. en_US
dc.language.iso en en_US
dc.publisher University of Bahrain en_US
dc.rights Attribution-NonCommercial-NoDerivatives 4.0 International *
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/4.0/ *
dc.subject Processor, Discrete wavelet packet transform, Hilbert transforms, FIR filter, Lifting steps en_US
dc.title VLSI Design of a Processor for Discrete Wavelet Packet and Hilbert Transforms en_US
dc.type Article en_US
dc.identifier.doi http://dx.doi.org/10.12785/ijcds/100109
dc.volume 10 en_US
dc.issue 1
dc.pagestart 83 en_US
dc.pageend 102 en_US
dc.source.title International Journal of Computing and Digital Systems en_US
dc.abbreviatedsourcetitle IJCDS en_US


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